Efficiency claims at this scale are always workload-relative, and the workload in question is the one the vendor selected. The 40% figure is measured against the previous generation running a training mix weighted toward the operations the new silicon accelerates most.

That does not make it false. It makes it a ceiling rather than an expectation.

Operators running mixed inference and training fleets should plan against a materially smaller number until independent measurements exist, and should note that energy savings at the chip level are frequently absorbed by higher density at the rack level, the total draw of the building goes up even as efficiency per operation improves.